In communication systems, and particularly in digital communication systems, there is a need to provide a line driver for driving digital data onto the transmission line so as to faithfully reproduce the desired signal with little or no distortion. Exemplary, but not exclusive, is a line driver in an integrated service digital network (ISDN) as defined by the American National Standard Institute (ANSI) in specification (ANSI T1.601-1988), incorporated by reference herein. The line driver typically is required to drive data over a twisted pair cable at rates up to 160 kilobits per second with magnitudes as high as six volts peak-to-peak. In order to achieve low distortion and maximum power transfer, the output impedance of the line driver must be as low as possible so that the termination impedance at the transmitter and receiver ends approximately equal each other and the line driver output impedance must maintain its value on the same order of magnitude at frequencies up to four times the Nyquist data rate.
In the design of a digital data line driver, tradeoffs must be made in order to accommodate cost versus performance. Typically, a line driver will have a differential input to facilitate a high common mode rejection ratio (CMRR) so that noise common to both inputs will cancel. A low distortion, high current output is also desirable so that a remotely located receiver can reconstruct pulse amplitude modulated (PAM) data within the appropriate time slot. A conventional but costly approach for realizing a line driver with a high CMRR is to use a circuit with multiple stages, each stage having common mode feedback circuitry associated with it, compounding the complexity and expense of the driver. A conventional line driver often achieves a high current, low distortion output signal with the use of a class AB current mirror output. However, high threshold voltages, bias current variations, and high temperatures limit the voltage swing of a current mirror output if more than one transistor is used within the configuration. The limitation on the output voltage swing is detrimental in systems having access only to a fixed voltage supply, such as is commonly found in systems with a single TTL 4.75 volt power supply. If a single transistor is used for the output stage, a gain (G.sub.m) of such transistor must be large enough to facilitate a limited swing on the input. The creation of such a transistor with a large G.sub.m results in it having a large gate capacitance, causing the overall output stage to have a lower non-dominant pole, thus decreasing the line driver's bandwidth. Additionally, a current mirror output cannot provide sufficient gain with relatively small resistive loads. Compounding the problems with the use of a current mirror output is that the line driver's bandwidth is further limited if crossover distortion is corrected by closed-loop feedback. If crossover distortion is corrected by increasing the bias currents in the line driver, higher standby power requirements result. Another technique commonly used to correct crossover distortion is dynamic common mode feedback. Inherent in this technique is the injection of undesirable clock noise, which in a sensitive data receiver such as one having an echo canceller circuit, impairs proper operation. Also, dynamic common mode feedback is difficult to analyze and is susceptible to perturbations in the input signal.
Still yet another technique used in line drivers is the sensing of an output common mode voltage. Because of the non-linear nature of a digital data driver output stage, sensing an output common mode voltage and feeding it back to the input stage results in unsatisfactory performance with large output swings.
Therefore, there is a need for an uncomplicated, cost-effective, low power, low distortion digital data line driver with the capability to provide wide output swings with a limited voltage source.